COURSES > DIGITAL LOGIC DESIGN (EEL3705.SP07.WEB_COHORT1) > COURSE LIBRARY > EXAMPLE CIRCUITS > BASIC COMBINATIONAL LOGIC |
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AND gate demo w. active-low I/O AND_alio_v2.zip (79.485 Kb) This project gives an interactive demonstration, using the MAX chip, of the function of a single AND gate, interfaced to external devices that use active-low logic. There are two versions of the circuit, which are equivalent and differ only in whether the schematic uses inverter bubbles or explicit inverters. In this circuit, we do input and output using active-low signals coming from the two MAX pushbuttons, and going to one of the MAX's bank of discrete LEDs. NOTE: In order for this circuit to work on the actual board, you must wire it up manually! |
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Basic Logic Gates Gates.zip (8.139 Kb) These schematics show implementations of some basic logic gates such as XOR, 3-input XOR, and a Majority gate. |
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Divisor-finding Circuit divisor-v1.zip (121.399 Kb) Circuit to find the largest divisor of an input number from 2 to 15. The version posted earlier (divisor.zip) was incomplete. The present version 1 is now complete, and works correctly in simulation. The functions have been minimized to DNF (SoP) or CNF (PoS) forms. |
