*============================================================ * registers.asm - Internal configuration/control/IO registers * of the HC11E9. *============================================================ #include "bits.asm" ; Defines BIT0-BIT7. rbase EQU $1000 ; Default base address of HC11 I/O control registers *---------------------------------------------------------------------- * Internal HC11 I/O registers defined as addresses starting from rbase. *---------------------------------------------------------------------- * Parallel I/O registers. PORTA EQU rbase+$00 ; Port A Data Register res0 EQU rbase+$01 ; Reserved register #0 PIOC EQU rbase+$02 ; Parallel I/O Control Register PORTC EQU rbase+$03 ; Port C Data Register PORTB EQU rbase+$04 ; Port B Data Register PORTCL EQU rbase+$05 ; Port C Latched Register res1 EQU rbase+$06 ; Reserved register #1 DDRC EQU rbase+$07 ; Port C Data Direction Register PORTD EQU rbase+$08 ; Port D Data Register DDRD EQU rbase+$09 ; Port D Data Direction Register PORTE EQU rbase+$0a ; Port E Data Register * Timer system registers. CFORC EQU rbase+$0b ; Timer Compare Force Register OC1M EQU rbase+$0c ; Output Compare 1 Mask Register OC1D EQU rbase+$0d ; Output Compare 1 Data Register TCNTH EQU rbase+$0e ; Timer Counter Register High (MSB) TCNTL EQU rbase+$0f ; Timer Counter Register Low (LSB) TIC1H EQU rbase+$10 ; Timer Input Capture 1 Register High (MSB) TIC1L EQU rbase+$11 ; Timer Input Capture 1 Register Low (LSB) TIC2H EQU rbase+$12 ; Timer Input Capture 2 Register High (MSB) TIC2L EQU rbase+$13 ; Timer Input Capture 2 Register Low (LSB) TIC3H EQU rbase+$14 ; Timer Input Capture 3 Register High (MSB) TIC3L EQU rbase+$15 ; Timer Input Capture 3 Register Low (LSB) TOC1H EQU rbase+$16 ; Timer Output Compare 1 Register High (MSB) TOC1L EQU rbase+$17 ; Timer Output Compare 1 Register Low (LSB) TOC2H EQU rbase+$18 ; Timer Output Compare 2 Register High (MSB) TOC2L EQU rbase+$19 ; Timer Output Compare 2 Register Low (LSB) TOC3H EQU rbase+$1a ; Timer Output Compare 3 Register High (MSB) TOC3L EQU rbase+$1b ; Timer Output Compare 3 Register Low (LSB) TOC4H EQU rbase+$1c ; Timer Output Compare 4 Register High (MSB) TOC4L EQU rbase+$1d ; Timer Output Compare 4 Register Low (LSB) TI4O5H EQU rbase+$1e ; Timer Input Capture 4/Output Compare 5 Register High (MSB) TI4O5L EQU rbase+$1f ; Timer Input Capture 4/Output Compare 5 Register Low (LSB) TCTL1 EQU rbase+$20 ; Timer Control Register 1 TCTL2 EQU rbase+$21 ; Timer Control Register 2 TMSK1 EQU rbase+$22 ; Timer Interrupt Mask 1 Register TFLG1 EQU rbase+$23 ; Timer Interrupt Flag 1 TMSK2 EQU rbase+$24 ; Timer Interrupt Mask 2 Register TFLG2 EQU rbase+$25 ; Timer Interrupt Flag 2 PACTL EQU rbase+$26 ; Pulse Accumulator Control Register PACNT EQU rbase+$27 ; Pulse Accumulator Count Register * Serial Peripheral Interface (SPI) registers. SPCR EQU rbase+$28 ; Serial Peripheral Control Register SPSR EQU rbase+$29 ; Serial Peripheral Status Register SPDR EQU rbase+$2a ; Serial Peripheral Data I/O Register * Serial Communications Interface (SCI) registers. BAUD EQU rbase+$2b ; Baud Rate Register SCCR1 EQU rbase+$2c ; Serial Communications Control Register 1 SCCR2 EQU rbase+$2d ; Serial Communications Control Register 2 SCSR EQU rbase+$2e ; Serial Communications Status Register SCDR EQU rbase+$2f ; Serial Communications Data Register * Analog-to-Digital (A2D) system registers. ADCTL EQU rbase+$30 ; Analog-to-Digital Control Status Register ADR1 EQU rbase+$31 ; Analog-to-Digital Results Register 1 ADR2 EQU rbase+$32 ; Analog-to-Digital Results Register 2 ADR3 EQU rbase+$33 ; Analog-to-Digital Results Register 3 ADR4 EQU rbase+$34 ; Analog-to-Digital Results Register 4 * Miscellaneous control and configuration registers. BPROT EQU rbase+$35 ; Block Protect Register EPROG EQU rbase+$36 ; EPROM Programming Control Register (711E20 only) res2 EQU rbase+$37 ; Reserved register #2 res3 EQU rbase+$38 ; Reserved register #3 OPTION EQU rbase+$39 ; System Configuration Options Register COPRST EQU rbase+$3a ; Arm/Reset COP Timer Circuitry Register PPROG EQU rbase+$3b ; EPROM and EEPROM Programming Control Register HPRIO EQU rbase+$3c ; Highest Priority I Bit Interrupt and Miscellaneous Reigster INIT EQU rbase+$3d ; RAM and I/O Mapping Register res4 EQU rbase+$3e ; Reserved register #4 CONFIG EQU rbase+$3f ; System Configuration Register *---------------------------------------------------------- * Individual register bits. * See datasheet for full descriptions. (Index on pp.38-43.) * * To use these, use BSET, BCLR, BRSET, BRCLR instructions * on the appropriate register address and with an * appropriate mask (logical OR of bits that you want). *---------------------------------------------------------- *---------------- * Parallel Ports * PORTA - Port A Data Register ($1000) PA7 EQU BIT7 ; Port A bit 7, through... PA6 EQU BIT6 PA5 EQU BIT5 PA4 EQU BIT4 PA3 EQU BIT3 PA2 EQU BIT2 PA1 EQU BIT1 PA0 EQU BIT0 ; Port A bit 0. * PIOC - Parallel I/O Control Register ($1002) STAF EQU BIT7 ; Strobe A Interrupt Status Flag STAI EQU BIT6 ; Strobe A Interrupt Enable Mask Bit CWOM EQU BIT5 ; Port C Wired-OR Mode Bit HNDS EQU BIT4 ; Handshake Mode Bit OIN EQU BIT3 ; Output or Input Handshake Select Bit PLS EQU BIT2 ; Pulsed/Interlocked Handshake Operation Bit EGA EQU BIT1 ; Active Edge for Strobe A Bit INVB EQU BIT0 ; Invert Strobe B Bit * PORTC - Port C Data Register ($1003) PC7 EQU BIT7 ; Port C bit 7... PC6 EQU BIT6 PC5 EQU BIT5 PC4 EQU BIT4 PC3 EQU BIT3 PC2 EQU BIT2 PC1 EQU BIT1 PC0 EQU BIT0 ; ...through Port C bit 0. * PORTB - Port B Data Register ($1004) PB7 EQU BIT7 ; Port B bit 7... PB6 EQU BIT6 PB5 EQU BIT5 PB4 EQU BIT4 PB3 EQU BIT3 PB2 EQU BIT2 PB1 EQU BIT1 PB0 EQU BIT0 ; ...through Port B bit 0. * PORTCL - Port C Latched Register ($1005) PCL7 EQU BIT7 ; Port C, Latched, bit 7... PCL6 EQU BIT6 PCL5 EQU BIT5 PCL4 EQU BIT4 PCL3 EQU BIT3 PCL2 EQU BIT2 PCL1 EQU BIT1 PCL0 EQU BIT0 ; ...through bit 0. * DDRC - Port C Data Direction Register ($1007) DDRC7 EQU BIT7 ; Data direction register for port C bit 7... DDRC6 EQU BIT6 DDRC5 EQU BIT5 DDRC4 EQU BIT4 DDRC3 EQU BIT3 DDRC2 EQU BIT2 DDRC1 EQU BIT1 DDRC0 EQU BIT0 ; ...through bit 0. * PORTD - Port D Data Register ($1008) PD5 EQU BIT5 ; Port D bit 5... PD4 EQU BIT4 PD3 EQU BIT3 PD2 EQU BIT2 PD1 EQU BIT1 PD0 EQU BIT0 ; ...through bit 0. * DDRD - Port D Data Register ($1009) DDRD5 EQU BIT5 ; Data direction register for port D, bit 5... DDRD4 EQU BIT4 DDRD3 EQU BIT3 DDRD2 EQU BIT2 DDRD1 EQU BIT1 DDRD0 EQU BIT0 ; ...through bit 0. * PORTE - Port E Data Register ($100a) PE7 EQU BIT7 ; Port E, bit 7... PE6 EQU BIT6 PE5 EQU BIT5 PE4 EQU BIT4 PE3 EQU BIT3 PE2 EQU BIT2 PE1 EQU BIT1 PE0 EQU BIT0 ; ...through bit 0. *----------------- * Timer facility * CFORC - Timer Compare Force Register ($100b) FOC1 EQU BIT7 FOC2 EQU BIT6 FOC3 EQU BIT5 FOC4 EQU BIT4 FOC5 EQU BIT3 * OC1M - Output Compare 1 Mask Register ($100c) OC1M7 EQU BIT7 OC1M6 EQU BIT6 OC1M5 EQU BIT5 OC1M4 EQU BIT4 OC1M3 EQU BIT3 * OC1D - Output Compare 1 Data Register ($100d) OC1D7 EQU BIT7 OC1D6 EQU BIT6 OC1D5 EQU BIT5 OC1D4 EQU BIT4 OC1D3 EQU BIT3 * TCTL1 - Timer Control Register 1 ($1020) OM2 EQU BIT7 OL2 EQU BIT6 OM3 EQU BIT5 OL3 EQU BIT4 OM4 EQU BIT3 OL4 EQU BIT2 OM5 EQU BIT1 OL5 EQU BIT0 * TCTL2 - Timer Control Register 2 ($1021) EDG4B EQU BIT7 EDG4A EQU BIT6 EDG1B EQU BIT5 EDG1A EQU BIT4 EDG2B EQU BIT3 EDG2A EQU BIT2 EDG3B EQU BIT1 EDG3A EQU BIT0 * TMSK1 - Timer Interrupt Mask 1 Register ($1022) OC1I EQU BIT7 OC2I EQU BIT6 OC3I EQU BIT5 OC4I EQU BIT4 I4O5I EQU BIT3 IC1I EQU BIT2 IC2I EQU BIT1 IC3I EQU BIT0 * TFLG1 - Timer Interrupt Flag 1 ($1023) OC1F EQU BIT7 OC2F EQU BIT6 OC3F EQU BIT5 OC4F EQU BIT4 I4O5F EQU BIT3 IC1F EQU BIT2 IC2F EQU BIT1 IC3F EQU BIT0 * TMSK2 - Timer Interrupt Mask 2 Register ($1024) TOI EQU BIT7 RTII EQU BIT6 PAOVI EQU BIT5 PAII EQU BIT4 PR1 EQU BIT1 PR0 EQU BIT0 * TFLG2 - Timer Interrupt Flag 2 ($1025) TOF EQU BIT7 RTIF EQU BIT6 PAOVF EQU BIT5 PAIF EQU BIT4 * PACTL - Pulse Accumulator Control Register ($1026) DDRA7 EQU BIT7 PAEN EQU BIT6 PAMOD EQU BIT5 PEDGE EQU BIT4 DDRA3 EQU BIT3 I4O5 EQU BIT2 RTR1 EQU BIT1 RTR0 EQU BIT0 *----------------------------------- * Serial Peripheral Interface (SPI) * SPCR - Serial Peripheral Control Register ($1028) SPIE EQU BIT7 SPE EQU BIT6 DWOM EQU BIT5 MSTR EQU BIT4 CPOL EQU BIT3 CPHA EQU BIT2 SPR1 EQU BIT1 SPR0 EQU BIT0 * SPSR - Serial Peripheral Status Register ($1029) SPIF EQU BIT7 WCOL EQU BIT6 MODF EQU BIT4 *--------------------------------------- * Serial Communications Interface (SCI) * BAUD - Baud Rate Register ($102b) TCLR EQU BIT7 SCP2 EQU BIT6 SCP1 EQU BIT5 SCP0 EQU BIT4 RCKB EQU BIT3 SCR2 EQU BIT2 SCR1 EQU BIT1 SCR0 EQU BIT0 * SCCR1 - Serial Communications Control Register 1 ($102b) R8 EQU BIT7 T8 EQU BIT6 M EQU BIT4 WAKE EQU BIT3 * SCCR2 - Serial Communications Control Register 2 ($102c) TIE EQU BIT7 TCIE EQU BIT6 RIE EQU BIT5 ILIE EQU BIT4 TE EQU BIT3 RE EQU BIT2 RWU EQU BIT1 SBK EQU BIT0 * SCSR - Serial Communications Status Register ($102e) TDRE EQU BIT7 TC EQU BIT6 RDRF EQU BIT5 IDLE EQU BIT4 OR EQU BIT3 NF EQU BIT2 FE EQU BIT1 * SCDR - Serial Communications Data Register ($102f) R7T7 EQU BIT7 R6T6 EQU BIT6 R5T5 EQU BIT5 R4T4 EQU BIT4 R3T3 EQU BIT3 R2T2 EQU BIT2 R1T1 EQU BIT1 R0T0 EQU BIT0 *----------------------------------- * Analog-to-Digital (A2D) Converter * ADCTL - Analog-to-Digital Control Status Register ($1030) CCF EQU BIT7 SCAN EQU BIT5 MULT EQU BIT4 CD EQU BIT3 CC EQU BIT2 CB EQU BIT1 CA EQU BIT0 * BPROT - Block Protect Register ($1035) PTCON EQU BIT4 BPRT3 EQU BIT3 BPRT2 EQU BIT2 BPRT1 EQU BIT1 BRPT0 EQU BIT0 * EPROG - EPROM Programming Control Register ($1036) MBE EQU BIT7 ELAT EQU BIT6 EXCOL EQU BIT5 EXROW EQU BIT4 T1 EQU BIT2 T0 EQU BIT1 PGM EQU BIT0 * OPTION - System Configuration Options Register ($1039) ADPU EQU BIT7 CSEL EQU BIT6 IRQE EQU BIT5 DLY EQU BIT4 CME EQU BIT3 CR1 EQU BIT1 CR0 EQU BIT0 * PPROG - EPROM and EEPROM Programming Control Register ($103b) ODD EQU BIT7 EVEN EQU BIT6 BYTE EQU BIT4 ROW EQU BIT3 ERASE EQU BIT2 EELAT EQU BIT1 EPGM EQU BIT0 * HPRIO - Highest Priority I Bit Interrupt and Miscellaneous Register ($103c) RBOOT EQU BIT7 SMOD EQU BIT6 MDA EQU BIT5 IRVNE EQU BIT4 PSEL3 EQU BIT3 PSEL2 EQU BIT2 PSEL1 EQU BIT1 PSEL0 EQU BIT0 * INIT - RAM and I/O Mapping Register ($103d) RAM3 EQU BIT7 RAM2 EQU BIT6 RAM1 EQU BIT5 RAM0 EQU BIT4 REG3 EQU BIT3 REG2 EQU BIT2 REG1 EQU BIT1 REG0 EQU BIT0 * CONFIG - System Configuration Register ($103f) NOSEC EQU BIT3 NOCOP EQU BIT2 ROMON EQU BIT1 EEON EQU BIT0