*================================================================
* FILE:        factorial.asm
*
* DESCRIPTION: Test program for the ERISC processor model.
*              This test program can be generated with the c2asm.exe
*              program from DSP with FPGAs 3/e and implemented
*              a factorial test. The IPORT data are read and the
*              factorial is computed. The test data should be:
*              IPORT (hex): 0   1    2    3    4   5  
*              OPORT (hex): 1   1    2    6    18  78 
*              OPORT data are displayed on the LEDs and SSD in hex 
*              i.e. 5!=120 (dec)=78 (hex). Since this is a 8 bit
*              uP larger than 5 IPORT value will show at the output 
*              only 8 bit LSBs.
*================================================================
	.global _EXIT
	.text
x       .set 1
k       .set 2
        NOP  
        PUSHI 1
        POP   x
        SCAN
        POP   k
L00:    PUSH  k
        PUSHI 1
        BEQ   @L01
        PUSH x
        PUSH k
        MUL
        POP x
        PUSH k
        PUSHI 1
        SUB
        POP k
        JMP @L00
L01:    PUSH x
        PRINT
        NOP 
        NOP 
        JMP @0
        JMP @0
        JMP @0
        NOP 
        NOP 
	.end