-------------------------------------------------------------------------------- -- Company: FSU-FAMU -- Engineer: YOUR_NAME -- Create Date: TODAY -- Design Name: butterfly for w^0=1 -- Project Name: lab 7 -- Target Device: EP2C35F672C6 -- Tool versions: Quartus II 9.1 -- Description: This is a Module for the FFT lab for the book DSP with FPGAs. -- It computes the Butterfly for w^0=1; equations: -- Dre<=Are+Bre; Dim<=Aim+Bim; -- Ere<=Are-Bre; Eim<=Aim-Bim; -- -- Dependencies: None -- -- Resources used: -- Total Number LEs: -- Number of 9x9 Mults: -- Bits of M4Ks: 0 -- Maximum Delay is ns => MHz -------------------------------------------------------------------------------- PACKAGE N0_bit_int IS -- User define Types, Objects, Attributes SUBTYPE S16 IS INTEGER RANGE -2**15 TO 2**15-1; END N0_bit_int; LIBRARY work; USE work.N0_bit_int.ALL; LIBRARY ieee; -- Using predefined Packages USE ieee.std_logic_1164.ALL; USE ieee.std_logic_arith.ALL; ENTITY bf0 IS ------> Interface PORT (Are, Aim, Bre, Bim : IN S16; Dre, Dim, Ere, Eim : OUT S16); END; ARCHITECTURE fpga OF bf0 IS BEGIN Dre<=Are+Bre; Dim<=Aim+Bim; Ere<=Are-Bre; Eim<=Aim-Bim; END fpga;